Recent Publications

  • Shilpa Bhoj and Dinesh Bhatia, “Thermal Modeling and Temperature Driven Placement for FPGAs” IEEE International Conference on Circuits and Systems (ISCAS), New Orleans, May 2007.
  • A. Hande, T. Polk, W. Walker, Dinesh Bhatia, “Indoor Solar Energy Harvesting for Sensor Network Router Nodes”, Journal of Microprocessors and Microsystems- Special Issue on Sensor Systems, (accepted)
  • Narayan Subramanian, Rajarshee Bharadwaj, Dinesh Bhatia, “A Leakage Aware Design Methodology for Power-gated Programmable Architectures”, IEEE International Conference on Field Programmable Technology (FPT), Bangkok, Thailand, December 2006.
  • W. Walker, T. Polk, A. Hande, and D. Bhatia, “Remote Blood Pressure Monitoring Using a Wireless Sensor Network”, IEEE Sixth Annual Emerging Information Technology Conference, August 2006.
  • T. Polk, A. Hande, W. Walker, and D. Bhatia, “Wireless Telemetry for Oxygen Saturation Measurements”, IEEE Biomedical Circuits and Systems (BiOCAS) Conference, London, UK, November 2006
  • Sanjay P. Singh, Shilpa Bhoj, Dheera Balasubramanian, Tanvi Nagda, Dinesh Bhatia, Poras Balsara, “Generic Network Interface for Plug and Play NoC based Architecture”,  Lecture Notes in Computer Science, Volume 3985, Reconfigurable Computing: Architectures and Applications, pp. 287-298, 2006. Presented at International Workshop on Applied Reconfigurable Computing (AR2006), Delft, The Netherlands, March 1-3, 2006.
  • Abhiman Hande, Todd Polk, William Walker, Dinesh Bhatia, “Self-Powered Wireless Sensor Networks for Remote Patient Monitoring in Hospitals” Sensors 2006, 6, 1102-1117, ISSN 1424-8220.
  • Parivallal Kannan and Dinesh Bhatia, “Interconnect Estimation for FPGAs”, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, Vol. 25, No. 8, pp 1523-1534, August 2006.
  • Shankar Balachandaran, Parivallal Kannan, and Dinesh Bhatia, “On Metrics for Routability Estimation for FPGAs”, IEEE Transactions on VLSI Systems, Vol. 12, No. 4, April 2004, pp. 381-385.
  • Manjunath Gangadhar and Dinesh Bhatia, “FPGA based EBCOT Architecture for JPEG 2000”, Journal of Microprocessors and Microsystems, Vol 29, 8-9, pp. 363-373.
  • Mukesh Chugh, Dinesh Bhatia, Poras Balsara, “Design and Implementation of Configurable W-CDMA Rake Receiver Architectures on FPGA”, 12th Reconfigurable Architectures Workshop RAW 2005.
  • R. Manimegalai, E. Siva Soumya, V. Muralidharan, B. Ravindran, V. Kamakoti, Dinesh Bhatia, “Placement and Routing for 3D-FPGAs using Reinforcement Learning and Support Vector Machines”, 18th International Conference on VLSI Design, IEEE Press, January 2005
  • Rajarshee Bhardwaj, Rajan Konar, Poras Balsara, Dinesh Bhatia, “Exploiting Temporal Idleness to Reduce Leakage in Programmable Architectures”, 10th Asia and South Pacific Design Automation Conference, Shanghai, January 2005.
  • Shankar Balachandaran, Parivallal Kannan, and Dinesh Bhatia, “On Metrics for Routability Estimation for FPGAs”, IEEE Transactions on VLSI Systems, April 2004, pp. 381-385.
  • Parivallal Kannan and Dinesh Bhatia, “Estimating Pre-Placement FPGA Interconnection Requirements”, 17th International Conference on VLSI Design, IEEE Press, January 2004.
  • J. M. Emmert, S. Lodha, and Dinesh Bhatia, “On Using Tabu Search for Design Automation of VLSI Systems, Journal of Heuristics 9(1), pp. 75-90, January 2003, Kluwer Academic Publishers.
  • Manjunath Gangadhar and Dinesh Bhatia, “FPGA Based EBCOT Architecture for JPEG 2000”, IEEE International Conference on Field Programmable Technology, Tokyo, Japan, December 2003.
  • Parivallal Kannan and Dinesh Bhatia, “Interconnect Estimation for FPGAs under Timing Driven Domains”, IEEE International Conference on Computer Design (ICCD), October 2003.
  • Parivallal Kannan and Dinesh Bhatia, “Interconnection Estimation for Segmented FPGA Architectures”, 16th Annual IEEE International SoC Conference, September 2003.
  • Shankar Balachandran and Dinesh Bhatia, “A-priori Wirelength and Interconnect Estimation Based on Circuit Characteristics”, ACM Symposium on System Level Interconnect Prediction (SLIP), 2003.
  • Parivallal Kannan, Shankar Balachandaran, Dinesh Bhatia, “Rapid and Reliable Routability Estimation for FPGAs”, International workshop on field programmable logic, Montpellier, France, September 2002. Lecture Notes in Computer Science, LNCS 2438, Springer Verlag, Volume 2438, pp. 242-252, ISBN 3-540-44108-5 (2002).
  • Shankar Balachandaran, Parivallal Kannan, and Dinesh Bhatia, “On Metrics for Routability Estimation for FPGAs”, IEEE/ACM Design Automation Conference, New Orleans, June 2002.
  • Shankar Balachandaran, Parivallal Kannan, and Dinesh Bhatia, “On Routing Demand and Congestion Estimation for FPGAs”, Proceedings of joint meeting of 7th Asia and South Pacific Design Automation Conference and 15th International Conference on VLSI Design, IEEE Press, January 2002.

 

 

 

 

 




  
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